处理器-酷睿处理器-AT80580PJ0676M

参数	数值
# of Cores	4
# of Processing Die Transistors	456 million
# of Threads	4
AES New Instructions	No
Bus/Core Ratio	8
Clock Speed	2.66 GHz
Embedded Options Available	Yes
Enhanced Intel SpeedStep® Technology	Yes
Execute Disable Bit	Yes
FSB Parity	No
FSB Speed	1333 MHz
Idle States	Yes
Instruction Set	64-bit
Intel® 64	Yes
Intel® Demand Based Switching	No
Intel® Hyper-Threading Technology	No
Intel® Trusted Execution Technology	Yes
Intel® Turbo Boost Technology	No
Intel® Virtualization Technology (VT-x)	Yes
Intel® Virtualization Technology for Directed I/O (VT-d)	Yes
L2 Cache	6 MB
Launch Date	Q3'08
Lithography	45 nm
Low Halogen Options Available	See MDDS
Max TDP	95 W
Package Size	37.5mm x 37.5mm
Processing Die Size	164 mm 2
Processor Number	Q9400
Recommended Customer Price	TRAY: $183 BOX : $200
Sockets Supported	LGA775
Status	Launched
Supplemental SKU	No
T CASE	71.4°C
Thermal Monitoring Technologies	Yes
VID Voltage Range	0.8500v-1.3625v

这些多核处理器基于英特尔® 酷睿™ 微架构和 45 纳米技术，并具备增大的高速缓存容量；它们提高了多线程应用和多任务环境的计算能力，以满足要求高性能、低能耗的嵌入式应用的需求。

英特尔® 虚拟化技术： 在单一硬件平台上实现多个环境以提高灵活性和系统利用率。
英特尔® 可信执行技术： 实现测量启动和保护执行等安全性功能。
英特尔® 高级智能高速缓存： 通过动态分配共享的二级高速缓存而提高系统性能。
英特尔® 64 架构： 支持 64 位指令。

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AT80580PJ0676M

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25	White Paper: DDR Signal Integrity (SI) Simulation Process for Intel® Architecture Platforms	White Paper: DDR Signal Integrity (SI) Simulation Process for Intel® Architecture Platforms
26	White Paper: Debugging Machine Check Exceptions on Embedded IA Platforms	White Paper: Debugging Machine Check Exceptions on Embedded IA Platforms
27	White Paper: Designing Systems without a Suspend Supply	White Paper: Designing Systems without a Suspend Supply
28	White Paper: Embedded Intel® Architecture and High Speed Digital Design Principles	White Paper: Embedded Intel® Architecture and High Speed Digital Design Principles
29	White Paper: Hardware Level I/O Benchmarking of PCI Express on Intel® Platforms	White Paper: Hardware Level I/O Benchmarking of PCI Express on Intel® Platforms
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32	White Paper: Interfacing I²C Devices to Intel's SMBus Controller	White Paper: Interfacing I²C Devices to Intel's SMBus Controller
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34	White Paper: Layer 3 Forwarding and IPSec Measurement and Optimization	White Paper: Layer 3 Forwarding and IPSec Measurement and Optimization
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36	White Paper: Platform-Level error Handling Strategies for Intel® Systems	White Paper: Platform-Level error Handling Strategies for Intel® Systems
37	White Paper: Programming Models for Packet Processing Applications on Multi-Core Intel® Architecture	White Paper: Programming Models for Packet Processing Applications on Multi-Core Intel® Architecture Systems
38	White Paper: Reducing Interrupt Latency in Embedded Systems through Message Signaled Interrupts	White Paper: Reducing Interrupt Latency in Embedded Systems through Message Signaled Interrupts
39	White Paper: Seven Tips to Get Started on Embedded Multi-Core	White Paper: Seven Tips to Get Started on Embedded Multi-Core
40	White Paper: Signal Integrity Pitfalls When You Deviate from Intel Design Guidelines	White Paper: Signal Integrity Pitfalls When You Deviate from Intel Design Guidelines
41	White Paper: Thermal Design Considerations for Embedded Applications	White Paper: Thermal Design Considerations for Embedded Applications
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