开发工具/系统-数字实现-VoltageStorm Power Verification

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Cadence® VoltageStorm Power Verification automates the analysis and optimization of de-coupling capacitance size and location, and it reduces dynamic IR drop on the most complex, low-power designs. VoltageStorm Power Verification provides accurate power consumption data (static and dynamic power calculation, including state-dependent leakage), which is an increasing concern for nanometer-scale designs.

Features/Benefits

Automates the management of IR drop, from planning through signoff
Eliminates over-design
Decreases the risk of IR drop-related failures and power-rail electromigration failures early in the design process

文档(Document)

序号	PDF	描述
1	An Effective EM/IR-Drop Flow with UltraSim and VoltageStorm/ ElectronStorm Options	An Effective EM/IR-Drop Flow with UltraSim and VoltageStorm/ ElectronStorm Options
2	Cadence Low-Power Solution Demo	Cadence Low-Power Solution Demo
3	Dynamic IR-Drop Analysis with VoltageStorm DG Using Different Power Grid Views for Cell Modeling	Dynamic IR-Drop Analysis with VoltageStorm DG Using Different Power Grid Views for Cell Modeling
4	Low-Power Design of DLX Processor Core using Encounter Platform	Low-Power Design of DLX Processor Core using Encounter Platform
5	Practical Guide to Low-Power Design - User Experience with CPF	Practical Guide to Low-Power Design - User Experience with CPF
6	Real Design Challenges of Low-Power Physical Implementation	Real Design Challenges of Low-Power Physical Implementation
7	UltraSim Netlist-Based Memory EMIR Flow	UltraSim Netlist-Based Memory EMIR Flow
8	VoltageStorm Power and Power Rail Verification Datasheet	VoltageStorm Power and Power Rail Verification Datasheet

VoltageStorm Power Verification

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